RISC-V SoCs form Inception to Tapeout

Opensource Instruction Set Architecture (ISA) is a game changer in general purpose processor design. These non-proprietary HW enabling a new era of innovation in building customized and secure System-on-Chip (SoC). RISC-V is an example of opensource ISA with mature ecosystem that is currently used to build complex SoCs. In this course, attendees will learn about fundamentals of processor design and understand the ecosystem of RISC-V and how to use it to build an entire SoC from inception to preparing the design for Tapeout phase.